EP1S30F1020C6 vs EP1S60F1020 对比

详细并排对比 EP1S30F1020C6 出自 Altera 和 EP1S60F1020 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1S60F1020 EP1S60F1020 - Stratix 57K LEs, 1020-BGA FPGA | Altera

EP1S60F1020 - Stratix 57K LEs, 1020-BGA FPGA | Altera

EP1S60F1020 ⚠ 最后一次采购

规格对比

参数 EP1S30F1020C6 EP1S60F1020
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $262.00 $3,995.00
Family Stratix Altera Stratix (EP1S)
Core Voltage 1.5 V 1.5 V
Process Technology 0.13 micrometer SRAM, all-layer copper 0.13 um CMOS
Logic Elements 32470 —
Total RAM Bits 3317184 5,215,104
DSP Blocks 28 —
Embedded Multipliers Yes, 9-bit x 9-bit elements —
User I/O Pins 726 —
封装 1020-ball FCBGA (BBGA) 1020-BGA (FineLine FBGA)
安装类型 Surface Mount Surface Mount (BGA)
Speed Grade 6 —
Temperature Grade Commercial (C) —
Configuration Method SRAM-based, JTAG boundary-scan —
工作温度 0C to +85C (commercial) —
MSL 等级 [DATA_NEEDED: MSL Level] [DATA_NEEDED: MSL rating]
RoHS 状态 [DATA_NEEDED: RoHS Status] [DATA_NEEDED: verify per part suffix]
Series — Stratix
Logic Elements (LEs) — 57,120
Logic Array Blocks (LABs) — 5,712
Embedded Multipliers (DSP Blocks) — [DATA_NEEDED: DSP block count]
User I/Os — 773
PLLs — [DATA_NEEDED: PLL count, nominally 12 for Stratix EP1S60]
Operating Temperature (base part) — Commercial (0C to +85C)
Speed Grade (base part) — [DATA_NEEDED: trailing suffix needed for explicit grade]
I/O Standard Support — LVDS, LVPECL, SSTL, HSTL, PCI/PCI-X
Configuration Memory — SRAM-based, requires external configuration device

数据手册与资源

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