EP1S40B956C6 vs EP1S30B956C6 对比

详细并排对比 EP1S40B956C6 出自 Intel 和 EP1S30B956C6 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S40B956C6 EP1S30B956C6
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $1,078.40 $78.00
Family Stratix Stratix
Logic Elements / Cells 41,250 —
Logic Array Blocks (LABs) 4,125 3,247
CLB Equivalents / Registers 46,970 —
User I/O Pins 683 —
封装 BGA-956 (956-BBGA, FCBGA) 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch
Package Size 40 x 40 mm —
Ball Pitch 1.27 mm —
Speed Grade 6 (commercial, slowest) C6
Core Supply Voltage 1.5 V —
工作温度 0C to 85C 0 C to 85 C (Commercial)
Logic Family CMOS —
安装类型 Surface Mount Surface Mount
Process Technology 0.13 um CMOS 130 nm CMOS
Embedded Memory TriMatrix (M512, M4K, M-RAM blocks) —
DSP Blocks Embedded multiplier blocks Yes (Stratix DSP blocks)
PLLs Multiple phase-locked loops Up to 12
Lead-Free / RoHS Per Altera/Intel datasheet —
Logic Elements (LEs) — 32,470
Embedded Memory Bits — 3,317,184 (approximately 3.4 Mbit)
Maximum User I/O — 683
Core Voltage (VCCINT) — 1.5 V
Maximum Internal Frequency — 450.05 MHz (per family datasheet)
Configuration Modes — Passive Serial (PS), Passive Parallel (PP), JTAG
RoHS 状态 — Not confirmed - pre-RoHS part
MSL 等级 — [DATA_NEEDED: MSL level]
Lead-Free — Unknown

数据手册与资源

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