EP1S60F1020 vs EP1S60F1020C7 对比

详细并排对比 EP1S60F1020 出自 Altera 和 EP1S60F1020C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1S60F1020 EP1S60F1020 - Stratix 57K LEs, 1020-BGA FPGA | Altera

EP1S60F1020 - Stratix 57K LEs, 1020-BGA FPGA | Altera

EP1S60F1020 ⚠ 最后一次采购

规格对比

参数 EP1S60F1020 EP1S60F1020C7
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $3,995.00 $1,750.00
Series Stratix Stratix
Family Altera Stratix (EP1S) Stratix (EP1S60)
Process Technology 0.13 um CMOS —
Logic Elements (LEs) 57,120 —
Logic Array Blocks (LABs) 5,712 —
Total RAM Bits 5,215,104 —
Embedded Multipliers (DSP Blocks) [DATA_NEEDED: DSP block count] —
User I/Os 773 —
PLLs [DATA_NEEDED: PLL count, nominally 12 for Stratix EP1S60] Up to 12 enhanced PLLs per die
封装 1020-BGA (FineLine FBGA) 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch
Core Voltage 1.5 V —
Operating Temperature (base part) Commercial (0C to +85C) —
Speed Grade (base part) [DATA_NEEDED: trailing suffix needed for explicit grade] —
安装类型 Surface Mount (BGA) Surface Mount
MSL 等级 [DATA_NEEDED: MSL rating] 3 (per BGA moisture-sensitivity norms)
RoHS 状态 [DATA_NEEDED: verify per part suffix] Compliant (lead-free)
I/O Standard Support LVDS, LVPECL, SSTL, HSTL, PCI/PCI-X —
Configuration Memory SRAM-based, requires external configuration device —
Logic Elements — 57,120
Total Memory Bits — 5,215,104
Maximum User I/O — 773
Logic Family — CMOS
工作温度 — 0C to +85C (Commercial)
Core Supply Voltage — 1.5 V
Speed Grade — 7
Logic Cells / Logic Blocks — 6,570 (per datasheet Section I nomenclature)
DSP Blocks — Embedded dedicated multiplier / adder blocks
Configuration Method — Serial or parallel with optional decompression

数据手册与资源

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