EP1S60F1020I6GB vs EP1S60F1020C7 对比

详细并排对比 EP1S60F1020I6GB 出自 Intel 和 EP1S60F1020C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S60F1020I6GB EP1S60F1020C7
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $4,200.00 $1,750.00
Family Stratix (First-generation) Stratix (EP1S60)
Logic Elements 57,120 57,120
Approximate Logic Array Blocks 6,570 —
Embedded Memory Bits 5,215,104 —
Maximum User I/O 773 773
封装 1020-ball FCBGA (33 x 33 mm, 1.0 mm pitch) 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch
安装类型 Surface Mount Surface Mount
工作温度 -40C to +100C (industrial, I6 grade) 0C to +85C (Commercial)
电源电压 Multi-rail (core 1.5 V, I/O 1.5/1.8/2.5/3.3 V per bank) —
Process Technology 0.13 µm CMOS —
DSP Blocks Yes (9 x 9 multipliers with 36-bit accumulators) Embedded dedicated multiplier / adder blocks
PLLs Yes (multiple, for clock management) Up to 12 enhanced PLLs per die
Configuration Modes Passive Serial, Fast Passive Parallel, JTAG —
MSL 等级 3 (168 hours, JEDEC J-STD-020) 3 (per BGA moisture-sensitivity norms)
RoHS 状态 Compliant (GB suffix) Compliant (lead-free)
Lead-Free Yes —
Series — Stratix
Total Memory Bits — 5,215,104
Logic Family — CMOS
Core Supply Voltage — 1.5 V
Speed Grade — 7
Logic Cells / Logic Blocks — 6,570 (per datasheet Section I nomenclature)
Configuration Method — Serial or parallel with optional decompression

数据手册与资源

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