EP1S60F1020I6N vs EP1S60F1020C7 对比

详细并排对比 EP1S60F1020I6N 出自 Altera 和 EP1S60F1020C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S60F1020I6N EP1S60F1020C7
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $3,650.00 $1,750.00
Series Stratix Stratix
Family Stratix FPGA (1st generation) Stratix (EP1S60)
Logic Elements (LEs) 57,120 —
Logic Array Blocks (LABs) 5,712 —
Logic Cells 6,570 —
Total RAM Bits 5,215,104 —
User I/O Count 773 —
工作温度范围 0°C to 85°C (I6 grade) —
电源电压 1.425 V to 1.575 V (1.5 V nominal core) —
Process Node 0.13 µm CMOS —
封装 1020-FBGA (33 x 33 mm, 1.0 mm pitch) 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch
Speed Grade 6 7
Temperature Grade I (Industrial) —
安装类型 Surface Mount (BGA) Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] 3 (per BGA moisture-sensitivity norms)
RoHS 状态 Compliant Compliant (lead-free)
Logic Elements — 57,120
Total Memory Bits — 5,215,104
Maximum User I/O — 773
Logic Family — CMOS
工作温度 — 0C to +85C (Commercial)
Core Supply Voltage — 1.5 V
Logic Cells / Logic Blocks — 6,570 (per datasheet Section I nomenclature)
DSP Blocks — Embedded dedicated multiplier / adder blocks
PLLs — Up to 12 enhanced PLLs per die
Configuration Method — Serial or parallel with optional decompression

数据手册与资源

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