EP1SGX25DF672C5N vs EP1SGX25DF800C5N 对比

详细并排对比 EP1SGX25DF672C5N 出自 Intel 和 EP1SGX25DF800C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX25DF672C5N EP1SGX25DF800C5N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $1,232.25 $158.00
Series Stratix GX —
Logic Elements 25,660 LE —
User I/O Count 455 —
Total RAM Bits 1,944,576 bits —
Supply Voltage (Core) 1.5 V (1.425 V to 1.575 V) 1.5 V typical
Transceiver Data Rate Up to 3.1875 Gbps —
Number of Transceivers 20 —
DSP Blocks 10 (dedicated 18x18 multipliers) Embedded multiplier blocks (family-wide)
Package Type 672-ball Flip-Chip BGA (FBGA-672) —
Package Dimensions 27 mm x 27 mm, 1.0 mm pitch —
工作温度 0 C to 85 C (Commercial) 0C to +85C (commercial)
Speed Grade C5 C5 (commercial)
Process Technology 130 nm CMOS 130 nm
Configuration Modes PS, PPS, FPP, JTAG —
安装类型 Surface Mount (FBGA) Surface Mount (BGA)
Lead Free / RoHS Lead free per Altera/Intel datasheet —
Family — Stratix GX
Device Logic Elements — 25,660 (typical)
Transceiver Channels — 8 (full-duplex)
Maximum Transceiver Data Rate — 3.1875 Gbps per channel
封装 — FBGA-800 (FineLine BGA, 31x31 mm)
Lead-Free / RoHS Status — Lead-free (N suffix)
On-Chip Memory (TriMatrix) — Approx. 2 Mbits total
PLLs — Up to 40 (device-wide)
Embedded 8b/10b Encoder/Decoder — Yes (one per transceiver channel)
PCI Express Hard IP — x1, x4 endpoints supported
MSL 等级 — [DATA_NEEDED: MSL Level]
Development Software — Quartus II (legacy)

数据手册与资源

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