EP1SGX25FG672C7 vs EP1SGX25DF672C7 对比

详细并排对比 EP1SGX25FG672C7 出自 Altera 和 EP1SGX25DF672C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX25FG672C7 EP1SGX25DF672C7
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $118.00 $125.40
Family Stratix GX Stratix GX
Series Stratix Stratix GX
Logic Elements (LE) 25,660 25,660
Total RAM Bits 1,944,576 bits 1,944,576
User I/O Pins 455 —
Embedded Transceivers Yes (multi-gigabit, up to 3.125 Gbps) Yes (GX family)
Number of Transceivers [DATA_NEEDED: exact transceiver count] —
PLLs 4 —
Global Clocks 16 —
封装 672-pin FineLine BGA (FG672) 672-FBGA (27 × 27 mm, 1.0 mm pitch)
工作温度 0C to +85C (commercial, speed grade C7) 0 °C to +85 °C (Commercial)
Core Voltage 1.5 V —
Process Technology 0.13 micron 0.13 µm CMOS, SRAM-based
安装类型 Surface Mount Surface Mount
Speed Grade 7 (commercial) C7 (moderate Fmax bin)
Configuration Method SRAM-based, JTAG/AS/PS supported —
RoHS 状态 [DATA_NEEDED: RoHS compliance] —
生命周期状态 Obsolete (per Altera/Intel product discontinuance notices) —
Logic Array Blocks (LABs) — 2,566
User I/O Count — 455
Embedded DSP Blocks — 14
Core Supply Voltage — 1.425 V to 1.575 V (1.5 V nominal)
Lead Free / RoHS — Lead-Free, RoHS Compliant
PLL Count — [DATA_NEEDED: PLL count]

数据手册与资源

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