EP1SGX25FG672C7 vs EP1SGX25FF800C5N 对比

详细并排对比 EP1SGX25FG672C7 出自 Altera 和 EP1SGX25FF800C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX25FG672C7 EP1SGX25FF800C5N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $118.00 $1,175.00
Family Stratix GX Stratix GX
Series Stratix —
Logic Elements (LE) 25,660 —
Total RAM Bits 1,944,576 bits —
User I/O Pins 455 —
Embedded Transceivers Yes (multi-gigabit, up to 3.125 Gbps) —
Number of Transceivers [DATA_NEEDED: exact transceiver count] —
PLLs 4 8 (4 enhanced + 4 fast)
Global Clocks 16 —
封装 672-pin FineLine BGA (FG672) 780-pin FineLine BGA (FBGA-780)
工作温度 0C to +85C (commercial, speed grade C7) 0 C to +85 C (commercial)
Core Voltage 1.5 V 1.5 V
Process Technology 0.13 micron —
安装类型 Surface Mount —
Speed Grade 7 (commercial) 5
Configuration Method SRAM-based, JTAG/AS/PS supported —
RoHS 状态 [DATA_NEEDED: RoHS compliance] Compliant (lead-free)
生命周期状态 Obsolete (per Altera/Intel product discontinuance notices) —
Logic Elements — 25,660
Embedded RAM — 2,243 Kbits
DSP Blocks — 10 (16x16 multipliers)
Embedded Multipliers — 160 (18x18 equivalent via DSP blocks)
Transceiver Channels — 4 full-duplex
Transceiver Data Rate (max) — 3.1875 Gbps
Maximum User I/O — 426
Process Node — 90 nm
MSL 等级 — 3 (per JEDEC J-STD-020)

数据手册与资源

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