EP1SGX40CF1020I5 vs EP1SGX40GF1020I5N 对比

详细并排对比 EP1SGX40CF1020I5 出自 Altera 和 EP1SGX40GF1020I5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX40CF1020I5 EP1SGX40GF1020I5N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $370.00 $140.00
Series Stratix GX —
Family Stratix (first generation) Stratix GX
Logic Elements 41,250 41,250
Configurable Logic Blocks (CLBs) 4,125 4,125
Total RAM Bits 3,423,744 —
Number of Logic Cells / Gates [DATA_NEEDED: gate count equivalent] —
Process Technology CMOS 130 nm CMOS
Supply Voltage (Core) 1.5 V —
Number of Transceivers 624 (per DigiKey listing family variant) —
Number of I/O Pins [DATA_NEEDED: user I/O count] —
Package Type FBGA-1020 (FineLine BGA) —
Package Dimensions 33 mm x 33 mm —
Ball Pitch 1.0 mm —
工作温度 -40C to +100C (industrial, I suffix) 0 C to +85 C (commercial; 'I' grade per some aggregators)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: confirmed RoHS per Intel/Altera] [DATA_NEEDED: RoHS compliance]
Configuration Memory SRAM-based (external config device required) —
Speed Grade 5 —
Device Family Suffix Decoding C = standard logic, F = enhanced, I = industrial temp —
Core Supply Voltage (VCCINT) — 1.425 V to 1.575 V (typ. 1.5 V)
High-Speed Transceiver Channels — 20
Transceiver Data Rate — 500 Mbps to 3.1875 Gbps per channel
Aggregate Serial Bandwidth — Up to 127.5 Gbps full-duplex
最大时钟频率 — 5000 MHz (transceiver; 6 MHz reported by some distributor aggregators)
Combinatorial Delay — 7.49 ns per CLB (reported)
封装 — 1020-ball FineLine BGA (FC-FBGA), 33 x 33 mm, 1 mm pitch
Temperature Grade (per aggregator) — Military (per Vyrian aggregator listing)

数据手册与资源

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