EP1SGX40DF1020C5ES vs EP1SGX40DF1020C7ES 对比

详细并排对比 EP1SGX40DF1020C5ES 出自 Intel 和 EP1SGX40DF1020C7ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP1SGX40DF1020C5ES EP1SGX40DF1020C5ES - 41,250-Cell Stratix GX FPGA | Intel

EP1SGX40DF1020C5ES - 41,250-Cell Stratix GX FPGA | Intel

EP1SGX40DF1020C5ES ✓ 量产中

规格对比

参数 EP1SGX40DF1020C5ES EP1SGX40DF1020C7ES
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $0.00 $1,325.00
Product Type Field-Programmable Gate Array (FPGA) —
Logic Family Stratix GX CMOS
Logic Technology CMOS —
Process Technology 130 nm 130 nm
Logic Cells 41,250 cells —
Logic Array Blocks 4,125 LABs —
Configurable I/O Connections 624 input and 624 output connections —
电源电压 1.5 V 1.5 V (core)
Reported Maximum Frequency 5,000 MHz —
Reported Maximum CLB Combinatorial Delay 7.49 ns —
Alternative Listed Maximum Clock Frequency 6 MHz —
Terminal Count 1,020 pins —
Package Type FC-FBGA-1020 —
Package Dimensions 33 mm x 33 mm —
Ball Pitch 1 mm —
工作温度 0 C to 85 C 0 C to 85 C (32 F to 185 F)
Mounting Configuration Surface-mount ball grid array —
Terminal Form Ball Ball
Package Code BGA —
Configuration Method [DATA_NEEDED: configuration method] —
RoHS 状态 unknown [DATA_NEEDED: RoHS status]
REACH Status unknown —
AEC-Q100 Qualification unknown —
Family — Stratix GX
Logic Elements — 41,250
封装 — FBGA-1020 (33 x 33 mm, 1.0 mm pitch)
Package Shape — Square
Number of Pins/Terminals — 1020
Temperature Grade — Commercial (speed grade C7)
安装类型 — Surface Mount (BGA)
Combinatorial Delay — 9.48 ns per CLB
最大时钟频率 — 4385.97 MHz (internal)
Manufacturer — Altera (now Intel PSG)

数据手册与资源

浏览全部产品 创建 BOM 获取报价