EP1SGX40DF1020C5N vs EP1SGX40DF1020C5ES 对比

详细并排对比 EP1SGX40DF1020C5N 出自 Intel 和 EP1SGX40DF1020C5ES 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。

Intel

EP1SGX40DF1020C5N - Stratix GX FPGA 41,250 LEs | Altera / Intel

EP1SGX40DF1020C5N Obsolete

Intel

EP1SGX40DF1020C5ES ✓ 量产中

参数	EP1SGX40DF1020C5N	EP1SGX40DF1020C5ES
品牌	Intel	Intel
分类	FPGA & CPLD	FPGA & CPLD
生命周期状态	Obsolete	有效
库存状态	有库存	有库存
单价（USD）	$210.00	$0.00
Series	Stratix GX	—
Logic Elements	41,250	—
Number of LABs/CLBs	4,125	—
Total Memory Bits	3,423,744	—
Number of I/O	624	—
封装	1020-BBGA (FC-FBGA), 33 x 33 mm, 1 mm pitch	—
安装类型	Surface Mount	—
Process Technology	130 nm CMOS	130 nm
Core Supply Voltage	1.5 V	—
工作温度	0C to 85C (Commercial)	0 C to 85 C
Speed Grade	C5	—
Logic Family	CMOS	Stratix GX
Programmable Type	In-System Programmable	—
Transceivers	Embedded multi-gigabit serial transceivers	—
Configuration	JTAG / EPCS serial	—
RoHS 状态	Compliant (lead-free)	unknown
Product Type	—	Field-Programmable Gate Array (FPGA)
Logic Technology	—	CMOS
Logic Cells	—	41,250 cells
Logic Array Blocks	—	4,125 LABs
Configurable I/O Connections	—	624 input and 624 output connections
电源电压	—	1.5 V
Reported Maximum Frequency	—	5,000 MHz
Reported Maximum CLB Combinatorial Delay	—	7.49 ns
Alternative Listed Maximum Clock Frequency	—	6 MHz
Terminal Count	—	1,020 pins
Package Type	—	FC-FBGA-1020
Package Dimensions	—	33 mm x 33 mm
Ball Pitch	—	1 mm
Mounting Configuration	—	Surface-mount ball grid array
Terminal Form	—	Ball
Package Code	—	BGA
Configuration Method	—	[DATA_NEEDED: configuration method]
REACH Status	—	unknown
AEC-Q100 Qualification	—	unknown