EP1SGX40FF1020C5 vs EP1SGX40FF1020C7 对比

详细并排对比 EP1SGX40FF1020C5 出自 Intel 和 EP1SGX40FF1020C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1SGX40FF1020C7 EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA

EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA

EP1SGX40FF1020C7 ⚠ 最后一次采购

规格对比

参数 EP1SGX40FF1020C5 EP1SGX40FF1020C7
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $1,245.00 $750.00
Family Stratix GX Stratix GX (EP1SGX40)
Logic Elements 41,250 —
Configurable Logic Blocks (CLBs) 4,125 —
Total RAM Bits 3,423,744 bits —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] 12
Transceiver Channels 20 (up to 3.125 Gbps) 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps
Core Voltage 1.5 V (1.425 V to 1.575 V) —
工作温度 0C to +85C (commercial, -C5 speed grade) 0 °C to 85 °C (commercial)
封装 1020-ball FCBGA (FF), 1.00 mm pitch, 33 x 33 mm 1020-ball FC-FBGA (S-PBGA-B1020)
Seated Height 3.50 mm —
Process Technology CMOS, 0.13 um CMOS
Maximum User I/O [DATA_NEEDED: max user I/O count] —
DSP Blocks [DATA_NEEDED: DSP block count] —
PLLs [DATA_NEEDED: PLL count] 8 enhanced + per-transceiver PLLs
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL rating] —
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant
Series — Stratix GX
Logic Elements (LE) — 41,250
Configurable Logic Blocks (CLB) — 4,125
Embedded Memory (bits) — 3,423,744
User I/O Pins — 624
Number of Logic Array Blocks (LAB) — 4,125
Core Supply Voltage (VCCINT) — 1.425 V to 1.575 V (nominal 1.5 V)
Speed Grade — 7 (-7, mid-speed)
Package Dimensions — 33 mm × 33 mm
Ball Pitch — 1.00 mm
Configuration Modes — PS, PPS, PPA, JTAG, AS
DSP Blocks (9-bit) — 176

数据手册与资源

浏览全部产品 创建 BOM 获取报价