EP1SGX40GF1020C5ES vs EP1SGX40DF1020C5ES 对比

详细并排对比 EP1SGX40GF1020C5ES 出自 Intel 和 EP1SGX40DF1020C5ES 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP1SGX40DF1020C5ES EP1SGX40DF1020C5ES - 41,250-Cell Stratix GX FPGA | Intel

EP1SGX40DF1020C5ES - 41,250-Cell Stratix GX FPGA | Intel

EP1SGX40DF1020C5ES ✓ 量产中

规格对比

参数 EP1SGX40GF1020C5ES EP1SGX40DF1020C5ES
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $195.00 $0.00
Family Stratix GX —
Logic Elements 41,250 —
Configurable Logic Blocks (CLBs) 4,125 —
Process Technology 130 nm CMOS 130 nm
Core Supply Voltage 1.5 V —
Maximum Internal Clock Frequency 5,000 MHz —
Embedded Transceivers Yes, multi-gigabit (3.125 Gbps) —
封装 1020-ball Flip-Chip FBGA (S-PBGA-B1020) —
Package Dimensions 33.00 mm x 33.00 mm 33 mm x 33 mm
Ball Pitch 1.00 mm 1 mm
Seated Height 3.50 mm —
Logic Family CMOS Stratix GX
Number of Terminals 1020 —
Terminal Form Ball Ball
工作温度 0 C to +85 C (Commercial) 0 C to 85 C
Part Suffix ES (Engineering Sample) —
安装类型 Surface Mount —
RoHS 状态 [DATA_NEEDED: RoHS status] unknown
Product Type — Field-Programmable Gate Array (FPGA)
Logic Technology — CMOS
Logic Cells — 41,250 cells
Logic Array Blocks — 4,125 LABs
Configurable I/O Connections — 624 input and 624 output connections
电源电压 — 1.5 V
Reported Maximum Frequency — 5,000 MHz
Reported Maximum CLB Combinatorial Delay — 7.49 ns
Alternative Listed Maximum Clock Frequency — 6 MHz
Terminal Count — 1,020 pins
Package Type — FC-FBGA-1020
Mounting Configuration — Surface-mount ball grid array
Package Code — BGA
Configuration Method — [DATA_NEEDED: configuration method]
REACH Status — unknown
AEC-Q100 Qualification — unknown

数据手册与资源

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