EP1SGX40GF1020C5ES vs EP1SGX40G 对比

详细并排对比 EP1SGX40GF1020C5ES 出自 Intel 和 EP1SGX40G 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX40GF1020C5ES EP1SGX40G
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $195.00 $595.00
Family Stratix GX Stratix GX
Logic Elements 41,250 41,250
Configurable Logic Blocks (CLBs) 4,125 —
Process Technology 130 nm CMOS [DATA_NEEDED: process node]
Core Supply Voltage 1.5 V —
Maximum Internal Clock Frequency 5,000 MHz —
Embedded Transceivers Yes, multi-gigabit (3.125 Gbps) —
封装 1020-ball Flip-Chip FBGA (S-PBGA-B1020) 1020-pin FineLine BGA
Package Dimensions 33.00 mm x 33.00 mm —
Ball Pitch 1.00 mm —
Seated Height 3.50 mm —
Logic Family CMOS —
Number of Terminals 1020 —
Terminal Form Ball —
工作温度 0 C to +85 C (Commercial) —
Part Suffix ES (Engineering Sample) —
安装类型 Surface Mount —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Total RAM Bits — 3,423,744
DSP Blocks — [DATA_NEEDED: DSP block count]
Maximum User I/O Pins — 624
Number of Transceivers — 20
Maximum Transceiver Data Rate — 3.1875 Gbps
Minimum Transceiver Data Rate — 500 Mbps
Transceiver Channels per Bank — 4
Supported Serial Standards — PCI Express, XAUI, Serial RapidIO, SerialLite II
8B/10B Encoder/Decoder — Hardware (dedicated per channel)
PLLs — [DATA_NEEDED: PLL count]
Speed Grades Available — C5, C6, C7, I5, I6, I7
Operating Temperature Range (Commercial) — 0C to +85C
Operating Temperature Range (Industrial) — -40C to +100C
Configuration Method — EPC enhanced configuration devices, JTAG
Vertical Migration — Supported within 1020-pin FineLine BGA package (EP1SGX25/EP1SGX40)

数据手册与资源

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