EP20K1000EBC652-2X vs EP20K1000EFI672-2X 对比

详细并排对比 EP20K1000EBC652-2X 出自 Altera 和 EP20K1000EFI672-2X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K1000EBC652-2X EP20K1000EFI672-2X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $99.00 $305.00
Family APEX-20KE APEX-20KE
Device Logic Elements 38,400 —
Typical Gates 1,000,000 system gates —
Embedded Memory Bits 327,680 bits —
User I/O Pins 488 —
Maximum User I/O 488 —
Propagation Delay 1.6 ns 1.6 ns
Internal Maximum Frequency 350 MHz —
Logic Blocks / Macros 2,560 macros —
PLLs 4 —
Core Voltage 1.8 V 1.8 V
Process Technology 0.22 µm (some sources 0.15 µm) all-layer copper-metal CMOS 0.15 micron all-layer copper-metal
封装 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch) —
安装类型 Surface Mount Surface Mount
工作温度 0 °C to +85 °C (commercial) 0C to +85C
Configuration Interface JTAG (IEEE 1149.1), Passive Serial, Altera configuration —
RoHS 状态 Compliant [DATA_NEEDED: RoHS status]
Device Type — SPLD / FPGA
Logic Elements / Cells — 38400
System Gates — 1,000,000
Number of Macros — 2560
Embedded Memory (Bits) — 327680
User I/Os — 508
Number of I/O Banks — [DATA_NEEDED: I/O banks]
I/O Voltage Support — 1.8 V / 2.5 V / 3.3 V
Package Type — 672-BBGA (FineLine BGA, 45 x 45 mm, 1.27 mm pitch)
JTAG Support — IEEE 1149.1 boundary-scan
PLL Count — 4
Speed Grade — -2X
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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