EP20K100CF144C7ES vs EP20K100CT144C7ES 对比
详细并排对比 EP20K100CF144C7ES 出自 Intel 和 EP20K100CT144C7ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EP20K100CT144C7ES - APEX-20K 100K Gate FPGA, 93 I/O, 144-LQFP | Altera
EP20K100CT144C7ES Nrnd规格对比
| 参数 | EP20K100CF144C7ES | EP20K100CT144C7ES |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $171.00 | $64.00 |
| Family | APEX-20K | — |
| Typical Gates | 100,000 | — |
| Logic Elements | 4,160 | 4,160 |
| Embedded Memory (RAM bits) | 53,248 | — |
| User I/O Pins | 93 | 93 |
| DLLs / Clock Management | 4 DLLs | — |
| 封装 | 144-LQFP (20x20 mm) | 144-LQFP (20x20 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| Speed Grade | C7 (commercial, mid-speed) | — |
| 工作温度 | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Core Voltage | 1.8 V (typical APEX-20K VCCINT) | — |
| I/O Voltage Reference | MultiVolt I/O - 3.3 V / 5 V tolerant | — |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Programming File Format | Quartus II / MAX+PLUS II SOF / POF | — |
| Variant Suffix | ES (engineering sample / special order) | — |
| MSL 等级 | [DATA_NEEDED: MSL Level] | 3 |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | Compliant (per Besenchips listing) |
| Series | — | APEX-20K |
| Core Voltage (VCCINT) | — | 2.375 V to 2.625 V |
| Typical Gate Count | — | 100,000 gates |
| Total RAM Bits | — | 53,248 bits |
| Process Technology | — | 0.18 µm CMOS |
| MultiVolt I/O Levels | — | 1.8 V, 2.5 V, 3.3 V, 5 V |
| Configuration Interface | — | IEEE 1149.1 JTAG |
| Lead-Free | — | Yes |