EP20K100FC144-1 vs EP20K100FC144-1X 对比

详细并排对比 EP20K100FC144-1 出自 Altera 和 EP20K100FC144-1X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100FC144-1 EP20K100FC144-1X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $78.50 $30.50
Series APEX-20K APEX-20K
Family APEX-20K —
Typical Gates 100,000 —
Logic Elements 4,160 —
Embedded RAM Bits 53,248 53,248
User I/O Pins 93 —
Number of Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] —
Number of Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] —
Number of Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count] —
Core Voltage 2.5 V [DATA_NEEDED: VCCINT]
I/O Voltage 3.3 V (PCI-compatible) [DATA_NEEDED: VCCIO range]
Speed Grade -1 (slowest) -1 (standard)
工作温度 [DATA_NEEDED: temperature grade] —
封装 144-LQFP 144-pin TQFP (FC)
安装类型 Surface Mount Surface Mount
Programmable Interface JTAG / IEEE 1532 (ISP) —
PCI Compliance 3.3V PCI compliant —
RoHS 状态 [DATA_NEEDED: RoHS compliance] Not RoHS compliant (legacy commercial TQFP)
Number of Logic Elements (LEs) — 4,160
Logic Array Blocks (LABs) — 416
Number of User I/O — 93
Number of Gates — 100,000 (typical system gates)
Temperature Grade — Commercial (0 °C to +85 °C)
Process Technology — 0.18 µm CMOS, SRAM-based configuration
Configuration Mode — Passive Serial / Passive Parallel / Boundary Scan
Lifecycle — Obsolete — discontinued by Intel/Altera

数据手册与资源

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