EP20K100FC144-2X vs EP20K100EFC144-1 对比

详细并排对比 EP20K100FC144-2X 出自 Intel 和 EP20K100EFC144-1 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100FC144-2X EP20K100EFC144-1
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $42.00 $61.75
Family APEX-20K —
Logic Elements 4,160 4,160
Number of LABs/CLBs 416 —
Total RAM Bits 53,248 —
Number of I/O 93 —
Number of Gates [DATA_NEEDED: gate count] —
Core Voltage 2.5 V —
I/O Voltage 3.3 V / 5 V tolerant —
工作温度 [DATA_NEEDED: operating temp range] 0 °C to 85 °C (commercial)
Speed Grade -2 —
封装 144-LQFP (FC) —
安装类型 Surface Mount Surface Mount
MSL 等级 3 —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: lead-free status] —
Architecture LUT-based with embedded array blocks —
Programming Interface JTAG (IEEE 1149.1) —
Device Family — APEX 20KE
Device Type — FPGA (Field Programmable Gate Array)
Typical Gates — 100,000
Maximum System Gates — 263,000
Embedded System Blocks (ESBs) — Yes (memory + dedicated logic)
User I/Os — 93
Propagation Delay — 1.6 ns
PLLs — 4
Package Type — 144-ball FBGA (13x13 mm, 1.0 mm pitch)
Core Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Voltage Support — 1.8 V / 2.5 V / 3.3 V (multiVolt I/O)
Process Technology — 0.15-µm all-layer copper
Configuration Method — SRAM (volatile) - external boot PROM required
Boundary-Scan Support — IEEE 1149.1 (JTAG)

数据手册与资源

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