EP20K100FC324-1V vs EP20K100EFC324-2X 对比

详细并排对比 EP20K100FC324-1V 出自 Intel 和 EP20K100EFC324-2X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100FC324-1V EP20K100EFC324-2X
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $118.40 $99.50
Series APEX-20K® —
Number of Logic Elements / Cells 4160 —
Total RAM Bits 53248 53,248 bits
Number of Gates (typical) 100000 —
Number of I/O 252 —
Number of LABs/CLBs [DATA_NEEDED: number of Logic Array Blocks] —
Number of EABs [DATA_NEEDED: number of Embedded Array Blocks] —
Supply Voltage - Core (VCCINT) 2.375 V to 2.625 V —
Supply Voltage - I/O (VCCIO) 3.0 V / 3.3 V / 5.0 V tolerant (per I/O standard) —
Speed Grade -1V (commercial) -2X
工作温度 0C to +85C (commercial) 0 °C to 85 °C (Commercial)
安装类型 Surface Mount Surface Mount
封装 / 外壳 324-FBGA (FineLine BGA, 19x19 mm) —
Supplier Device Package 324-FBGA —
Number of PLLs 4 —
I/O Standards Supported LVCMOS, LVTTL, PCI, SSTL, GTL+, HSTL —
Architecture MultiCore (LUT + product-term + embedded memory) —
Programming Interface JTAG (IEEE 1149.1) / in-system IEEE 1149.1 JTAG
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: confirm against lot-specific documentation]
Family — APEX 20KE
Device Type — SPLD / FPGA (Field Programmable Gate Array)
System Gates — 100,000 gates
Logic Elements / Cells — 4,160
LABs / CLBs — 416
Maximum User I/Os — 246
Number of I/O Banks — 8 (per APEX 20KE family)
Propagation Delay — 1.6 ns
Internal Operating Frequency — Up to 250 MHz
Core Supply Voltage (VCCINT) — 1.8 V
I/O Supply Voltage (VCCIO) — MultiVolt: 1.8 V / 2.5 V / 3.3 V
Process Technology — 0.22 µm CMOS (all-layer copper metal)
封装 — 324-ball FBGA (FineLine BGA), 19x19 mm, 1.27 mm pitch
Configuration Modes — Passive Serial, Passive Parallel, JTAG, Altera configuration EPROM

数据手册与资源

浏览全部产品 创建 BOM 获取报价