EP20K100FC324-2X vs EP20K100EFC324-2X 对比

详细并排对比 EP20K100FC324-2X 出自 Altera 和 EP20K100EFC324-2X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100FC324-2X EP20K100EFC324-2X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $110.11 $99.50
Family APEX-20K APEX 20KE
Logic Elements 4,160 —
Typical Gates 100,000 —
Maximum System Gates 263,000 —
Maximum User I/O 252 —
Embedded RAM Bits 53,248 —
Operating Frequency (max) 200 MHz —
Propagation Delay 1.6 ns 1.6 ns
Process Technology 0.22 µm CMOS 0.22 µm CMOS (all-layer copper metal)
Core Supply Voltage 2.5 V —
I/O Supply Voltage 3.3 V (5 V tolerant I/O) —
封装 324-ball FineLine BGA (FBGA) 324-ball FBGA (FineLine BGA), 19x19 mm, 1.27 mm pitch
安装类型 Surface Mount Surface Mount
工作温度 0 °C to +85 °C (Commercial) 0 °C to 85 °C (Commercial)
Configuration Interface JTAG (IEEE 1149.1) / Serial / Parallel —
RoHS 状态 Compliant [DATA_NEEDED: confirm against lot-specific documentation]
Device Type — SPLD / FPGA (Field Programmable Gate Array)
System Gates — 100,000 gates
Logic Elements / Cells — 4,160
Total RAM Bits — 53,248 bits
LABs / CLBs — 416
Maximum User I/Os — 246
Number of I/O Banks — 8 (per APEX 20KE family)
Internal Operating Frequency — Up to 250 MHz
Core Supply Voltage (VCCINT) — 1.8 V
I/O Supply Voltage (VCCIO) — MultiVolt: 1.8 V / 2.5 V / 3.3 V
Speed Grade — -2X
Programming Interface — IEEE 1149.1 JTAG
Configuration Modes — Passive Serial, Passive Parallel, JTAG, Altera configuration EPROM

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