EP20K100QC240-1 vs EP20K100QC240-1XV 对比

详细并排对比 EP20K100QC240-1 出自 Intel 和 EP20K100QC240-1XV 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100QC240-1 EP20K100QC240-1XV
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $98.00 $52.10
Family APEX 20K —
Device Type FPGA (Field-Programmable Gate Array) —
Logic Elements (LEs) 4,160 —
Typical Gates 100,000 —
Maximum User I/O 189 —
Embedded RAM Bits 53,248 —
Process Technology 0.22 µm CMOS 0.22 um CMOS
Core Supply Voltage 2.5 V —
Maximum Internal Frequency 250 MHz 250 MHz
Speed Grade -1 —
封装 240-pin PQFP (QFP-240) 240-pin PQFP (32 x 32 mm, 0.5 mm pitch)
Package Code S-PQFP-G240 —
Terminal Form Gull Wing —
Propagation Delay 1.6 ns (per datasheet, typical) —
工作温度 0 °C to +85 °C (Commercial) 0C to +85C (commercial) / -40C to +85C (industrial variant)
安装类型 Surface Mount Surface Mount (gull-wing leads)
JTAG Support IEEE 1149.1 Boundary Scan —
Programming In-system (SRAM-based) via Quartus / MAX+PLUS II —
Series — APEX 20K
Device Family — APEX 20K (MultiCore architecture)
System Gates — 100,000 gates
Logic Elements (Cells) — 4,160
Embedded Memory — 53,248 bits
User I/Os — 189
Dedicated Inputs — 4
PLLs — 4
Core Supply Voltage (VCCINT) — 2.5 V nominal (2.375 V to 2.625 V)
I/O Supply Voltage (VCCIO) — 3.3 V / 5 V tolerant
Propagation Delay (tpd) — 2.5 ns
Configuration Interface — JTAG / serial (EPC configuration device)
RoHS 状态 — Non-compliant (legacy PQFP, non-LEAD-FREE process)
生命周期状态 — Obsolete / last-time-buy per Altera PCN

数据手册与资源

浏览全部产品 创建 BOM 获取报价