EP20K160EQC240-2X vs EP20K160EQC240-2 对比

详细并排对比 EP20K160EQC240-2X 出自 Intel 和 EP20K160EQC240-2 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K160EQC240-2X EP20K160EQC240-2
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $22.75 $108.50
Series APEX-20KE —
Logic Elements 6,400 —
System Gates 160,000 —
Embedded Memory Bits 345,600 —
Maximum Internal Frequency 350 MHz —
Propagation Delay (Tpd) 1.93 ns —
Number of I/Os 175 (Mouser) / 271 (datasheet summary) —
Number of PLLs 4 —
Core Process Technology 0.22 um CMOS —
Core Voltage 1.71 V to 1.89 V (1.8 V nominal) —
I/O Voltage Multi-voltage (3.3 V / 2.5 V / 1.8 V compatible) —
封装 240-BQFP (PQFP-240, 32x32 mm) PQFP-240 (QFP-240, FQFP)
Speed Grade -2 -2
安装类型 Surface Mount (PQFP, gull-wing leads) Surface Mount (Gull Wing)
工作温度 0 C to 85 C (Commercial) 0 C to 85 C (Commercial)
Programming Interface IEEE 1149.1 JTAG + Altera ByteBlaster —
RoHS 状态 [DATA_NEEDED: lead-free / RoHS status] Non-compliant (original Altera-era PQFP)
Logic Family CMOS CMOS
Family — APEX 20KE
Typical Gates — 160,000
Logic Elements (LEs) — 6,400
Embedded System Blocks (ESBs) — 64
Maximum Embedded Memory — 56 Kbits (approx. 7 Kbytes usable)
Maximum User I/O (this package) — 175
Maximum User I/O (largest package) — 271
PLLs — 4
Internal Frequency (max) — 160 MHz
Propagation Delay — 1.55 ns
Process Technology — 0.18-micron SRAM CMOS
引脚数量 — 240
Supply Voltage (core) — [DATA_NEEDED: core VCC value]
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, GTL+, LVDS
Configuration Modes — Passive Serial, Passive Parallel Synchronous, JTAG
JTAG Support — IEEE Std. 1149.1 boundary-scan
MultiCore Architecture — Yes (Logic + ESB + I/O)
5.0 V Tolerance — Achievable with external resistor

数据手册与资源

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