EP20K200BC484-2X vs EP20K200BC484-1X 对比
详细并排对比 EP20K200BC484-2X 出自 Intel 和 EP20K200BC484-1X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EP20K200BC484-1X - APEX-20K 200K-Gate FPGA 382 I/O 484-BGA | Altera
EP20K200BC484-1X Obsolete规格对比
| 参数 | EP20K200BC484-2X | EP20K200BC484-1X |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $95.00 | $75.10 |
| Family | APEX-20K | — |
| Series | EP20K200 | EP20K200 |
| Logic Elements | 8,320 | — |
| LABs/CLBs | 832 | — |
| Embedded RAM | 106,496 bits | — |
| User I/O Pins | 382 | — |
| Dedicated Inputs | 4 | — |
| Supply Voltage (VCCINT) | 2.375 V to 2.625 V | — |
| 工作结温 | 0 °C to 85 °C | — |
| 封装 | 484-ball PBGA (BBGA-484) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Architecture | MultiCore™ (LUT + Embedded System Blocks) | — |
| Configuration | SRAM-based (requires external configuration memory) | — |
| Speed Grade | -2X | -1 (slowest commercial grade) |
| RoHS 状态 | Compliant (per supplier listings) | [DATA_NEEDED: RoHS compliance] |
| Maximum Clock Frequency (reference) | 178.57 MHz (per Altera datasheet for family) | — |
| Product Family | — | APEX-20K |
| Logic Elements / Cells | — | 8320 |
| Total RAM Bits | — | 106496 |
| Number of I/O | — | 382 |
| Number of Logic Gates | — | 200000 |
| Package Type | — | 484-BBGA (Fine-pitch Ball Grid Array) |
| Package Suffix | — | BC484 |
| 工作温度 | — | 0C to +85C (commercial, [DATA_NEEDED: full Tjj range]) |
| Configuration Method | — | SRAM - external serial/parallel PROM |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| PLL | — | ClockLock / ClockBoost |
| Embedded Memory Blocks | — | Embedded System Blocks (ESBs) - RAM/ROM/CAM |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |