EP20K200CB356C7N vs EP20K100CB356C7 对比
详细并排对比 EP20K200CB356C7N 出自 Intel 和 EP20K100CB356C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N Obsolete
规格对比
| 参数 | EP20K200CB356C7N | EP20K100CB356C7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $92.00 | $71.00 |
| Family | APEX 20KC | — |
| Series | EP20K200 | APEX20K |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | — |
| Maximum Operating Frequency | 3571.6 MHz (internal equivalent) | — |
| Propagation Delay | 1.48 ns | — |
| User I/Os | 263 | — |
| Input Terminals | 267 | — |
| Supply Voltage (Nominal) | 1.8 V | — |
| Process Technology | 0.15 um CMOS | 0.18 μm CMOS |
| 工作温度 | 0C to +85C (Commercial) | Commercial grade |
| 封装 | 356-ball PBGA (S-PBGA) | 356-LBGA |
| 安装类型 | Surface Mount | — |
| Embedded Memory | ESBs (dual-port RAM/ROM/FIFO) | — |
| Clock Management | PLL with up to 4 outputs | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| In-System Programmable | Yes | — |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Intel (formerly Altera) |
| Typical Gates | — | 100,000 |
| Maximum Logic Elements | — | 53,248 |
| User I/O Pins | — | 252 |
| Embedded Memory (Bits) | — | 53,248 |
| Number of PLLs | — | 4 |
| Core Voltage | — | 2.5 V |
| I/O Standards Supported | — | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Speed Grade | — | C7 |