EP20K200CF484C7ES vs EP20K200CF484C8ES 对比

详细并排对比 EP20K200CF484C7ES 出自 Intel 和 EP20K200CF484C8ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K200CF484C8ES EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES ⚠ 最后一次采购

规格对比

参数 EP20K200CF484C7ES EP20K200CF484C8ES
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $92.00 $89.00
Family APEX-20KC APEX 20K
Series APEX 20KC APEX-20KC
Logic Elements / Cells 8,320 —
Typical Gates 200,000 —
Number of LABs/CLBs 376 —
Total RAM Bits 106,496 —
Number of I/O 377 (max) —
Voltage - Supply 1.8 V core —
工作温度 0C to +85C (commercial) 0C to +85C (commercial)
安装类型 Surface Mount Surface Mount
封装 / 外壳 484-BBGA (FineLine BGA) —
Process Technology 0.18 µm CMOS —
Speed Grade C7 (7 ns) C8 (-8 commercial)
Silicon Status ES (Engineering Sample) —
Maximum Internal Frequency 375.94 MHz —
RoHS 状态 [DATA_NEEDED: rohs_status] —
Number of PLLs [DATA_NEEDED: pll_count] —
Logic Elements — 8,320
System Gates — 200,000
Embedded Memory (RAM bits) — 106,496
Number of Logic Array Blocks (LABs) — 104
Number of Embedded System Blocks (ESBs) — 13
User I/O Pins (max) — 376
PLLs — 4
Core Voltage — 1.8 V
封装 — 484-pin FBGA (FineLine BGA)
Process Node — 0.18 micron CMOS
Configuration Interface — JTAG (IEEE 1149.1) / Altera serial
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP
Lead Free / RoHS — [DATA_NEEDED: lead-free status]

数据手册与资源

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