EP20K200CF484C8 vs EP20K200FC484-2X 对比

详细并排对比 EP20K200CF484C8 出自 Intel 和 EP20K200FC484-2X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200CF484C8 EP20K200FC484-2X
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $410.75 $95.00
Family APEX 20KC APEX 20K
Logic Elements 8,320 —
System Gates 200,000 —
Embedded Memory Bits 106,496 bits —
Maximum User I/O 376 382
封装 484-FBGA (FineLine BGA, 23x23 mm) 484-pin FBGA (FineLine BGA), 1.0 mm pitch
Process Technology 0.15 µm CMOS 0.22 µm CMOS
Core Voltage 1.8 V —
工作温度 Commercial (0C to +85C) 0 °C to 85 °C (commercial)
Maximum Frequency 301.21 MHz (per FPGAkey listing) —
Embedded Memory Type ESB (Embedded System Block) — RAM/ROM/CAM/FIFO —
Configuration Modes Passive Serial, Passive Parallel Synchronous, Active Serial —
Supported I/O Standards LVTTL, LVCMOS, PCI, GTL+ —
RoHS 状态 Non-compliant (per alterachips.com listing) [DATA_NEEDED: RoHS compliance status]
安装类型 Surface Mount (BGA) Surface Mount
Series — EP20K200
Device Type — FPGA (Field Programmable Gate Array)
Maximum Logic Elements — 8,320 cells
Typical System Gates — 200,000
Embedded Memory (EAB) — 106,496 bits
Number of Logic Elements — 8,320
Propagation Delay — 3.0 ns
Maximum Internal Frequency — 200 MHz
Core Supply Voltage — 2.5 V
Speed Grade — -2 (with LVDS support, "X" suffix)
Programmable I/O Standards — 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS
JTAG Support — IEEE 1149.1 Boundary-Scan

数据手册与资源

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