EP20K200CF484C8ES vs EP20K200CF484C9N 对比
详细并排对比 EP20K200CF484C8ES 出自 Altera 和 EP20K200CF484C9N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K200CF484C8ES | EP20K200CF484C9N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $89.00 | $201.04 |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20KC |
| Logic Elements | 8,320 | 8,320 |
| System Gates | 200,000 | — |
| Embedded Memory (RAM bits) | 106,496 | — |
| Number of Logic Array Blocks (LABs) | 104 | — |
| Number of Embedded System Blocks (ESBs) | 13 | — |
| User I/O Pins (max) | 376 | — |
| PLLs | 4 | — |
| Core Voltage | 1.8 V | — |
| Speed Grade | C8 (-8 commercial) | C9 (250 MHz) |
| 封装 | 484-pin FBGA (FineLine BGA) | 484-pin FineLine BGA (FBGA) |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| 工作温度 | 0C to +85C (commercial) | — |
| Process Node | 0.18 micron CMOS | — |
| Configuration Interface | JTAG (IEEE 1149.1) / Altera serial | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP | — |
| Lead Free / RoHS | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Typical Gates | — | 200,000 |
| Embedded System Block (ESB) Bits | — | 106,496 |
| Maximum User I/O | — | 376 |
| 最大时钟频率 | — | 250 MHz |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) |
| Temperature Grade | — | Industrial (0C to +85C) |
| Configuration Scheme | — | SRAM-based, supports passive serial/parallel and JTAG |
| MSL 等级 | — | 3 (per JEDEC J-STD-020) |
| RoHS 状态 | — | Compliant |