EP20K200CF484C9 vs EP20K200CF484C9N 对比

详细并排对比 EP20K200CF484C9 出自 Altera 和 EP20K200CF484C9N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200CF484C9 EP20K200CF484C9N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $201.04 $201.04
Family APEX 20KC APEX 20KC
Series APEX-20KC —
Logic Elements 8,320 8,320
Total RAM Bits 106,496 —
User I/O 376 —
Number of Gates 200,000 (system gates) —
Core Voltage (VCCINT) 1.71 V to 1.89 V —
I/O Voltage (VCCIO) [DATA_NEEDED: VCCIO range] —
工作温度 0 C to +85 C (commercial) —
封装 484-BBGA / 484-FBGA (23 x 23 mm) 484-pin FineLine BGA (FBGA)
Supplier Device Package 484-FBGA (23x23) —
安装类型 Surface Mount Surface Mount (BGA)
Process Technology 0.18 µm CMOS 0.15 um CMOS
Speed Grade -9 (C9 = commercial, fastest) C9 (250 MHz)
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant
Lead-Free [DATA_NEEDED: lead-free status] —
Device Type — FPGA (Field-Programmable Gate Array)
Typical Gates — 200,000
Embedded System Block (ESB) Bits — 106,496
Maximum User I/O — 376
最大时钟频率 — 250 MHz
Core Supply Voltage (VCCINT) — 1.8 V
I/O Supply Voltage (VCCIO) — 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt)
Temperature Grade — Industrial (0C to +85C)
Configuration Scheme — SRAM-based, supports passive serial/parallel and JTAG
MSL 等级 — 3 (per JEDEC J-STD-020)

数据手册与资源

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