EP20K200EBC356-2 vs EP20K200EBC356-1 对比

详细并排对比 EP20K200EBC356-2 出自 Altera 和 EP20K200EBC356-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200EBC356-2 EP20K200EBC356-1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $99.50 $142.00
Series APEX 20KE —
Family APEX 20K (APEX 20KE enhancement) APEX 20K (APEX 20KE)
Typical Gates 200,000 —
Maximum Logic Elements 8320 —
Macros / Logic Cells 832 —
Maximum Flip-Flops 13,824 —
Embedded RAM 53,248 bits —
User I/Os 271 —
Number of Terminals / Pins 356 (LBGA) —
Propagation Delay 2.5 ns 2.5 ns
电源电压 2.5 V (core) —
工作温度 0 C to 85 C (commercial) 0 °C to 85 °C (Commercial)
Logic Family CMOS —
Number of PLLs 4 embedded PLLs —
Number of DDR Interfaces 4 —
Package Type 356-LBGA (EBC suffix) —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
Speed Grade -2 —
Compliance RoHS status [DATA_NEEDED: RoHS] —
System Gates — 200,000
Logic Elements / Cells — 8,320
Maximum User I/Os — 277
Core Voltage — 1.8 V (1.71 V to 1.89 V)
Process Technology — 0.22 µm CMOS
Internal Performance — Up to 367 MHz
封装 — 356-ball LBGA (35 x 35 mm)
Architecture — MultiCore (LUT + product-term + embedded memory)
On-chip Memory — Embedded System Blocks (ESB / SRAM)
Configuration Method — JTAG (ByteBlaster / MasterBlaster), passive serial
Development Software — Altera Quartus II
RoHS 状态 — [DATA_NEEDED: RoHS status not stated in verified sources]
生命周期状态 — Obsolete / EOL

数据手册与资源

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