EP20K200EBC652-2X vs EP20K1000EBC652-2X 对比
详细并排对比 EP20K200EBC652-2X 出自 Altera 和 EP20K1000EBC652-2X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EP20K1000EBC652-2X - 1M Gate APEX-20KE FPGA, 488 I/O, 652-BGA | Altera (Intel)
EP20K1000EBC652-2X Nrnd规格对比
| 参数 | EP20K200EBC652-2X | EP20K1000EBC652-2X |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $99.00 |
| Series | APEX-20KE® | — |
| Family | APEX-20KE | APEX-20KE |
| Device Logic Elements | 8,320 | 38,400 |
| Number of LABs/CLBs | 832 | — |
| Total RAM Bits | 106,496 | — |
| Number of I/O Pins | 376 | — |
| Number of Gates | 200,000 (typical) | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Operating Temperature (TJ) | 0C to +85C | — |
| 封装 | 652-BGA | 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch) |
| 安装类型 | Surface Mount | Surface Mount |
| Process Technology | 0.18 um CMOS | 0.22 µm (some sources 0.15 µm) all-layer copper-metal CMOS |
| I/O Standard Support | LVTTL, LVCMOS, LVDS, PCI, GTL+, SSTL | — |
| Configuration Method | Serial or Parallel PROM, JTAG (IEEE 1149.1) | — |
| Lead-Free / RoHS | Compliant (per DigiKey listing) | — |
| Typical Gates | — | 1,000,000 system gates |
| Embedded Memory Bits | — | 327,680 bits |
| User I/O Pins | — | 488 |
| Maximum User I/O | — | 488 |
| Propagation Delay | — | 1.6 ns |
| Internal Maximum Frequency | — | 350 MHz |
| Logic Blocks / Macros | — | 2,560 macros |
| PLLs | — | 4 |
| Core Voltage | — | 1.8 V |
| 工作温度 | — | 0 °C to +85 °C (commercial) |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Altera configuration |
| RoHS 状态 | — | Compliant |