EP20K200EBC652-3 vs EP20K1500EBC652-1X 对比

详细并排对比 EP20K200EBC652-3 出自 Intel 和 EP20K1500EBC652-1X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200EBC652-3 EP20K1500EBC652-1X
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $210.00 $175.00
Family APEX-20KE APEX 20KE
Logic Elements (LEs) 8,320 —
Logic Array Blocks (LABs) 832 —
Total RAM Bits 106,496 442368
Maximum User I/O Pins 376 —
Embedded System Blocks (ESBs) Yes (dual-port RAM / ROM / CAM) —
PLLs 4 —
封装 652-ball FineLine BGA (top-side, 1.27 mm pitch) 652-ball BGA (FCBGA / PBGA652)
安装类型 Surface Mount Surface Mount
工作温度 0C to +85C (EBC - Enhanced Commercial) 0 °C to +85 °C (commercial)
Speed Grade -3 —
Configuration Mode JTAG / PS / Passive-serial / Passive-parallel —
Process Node [DATA_NEEDED: process node] —
Core Voltage [DATA_NEEDED: core voltage] 1.8 V
RoHS 状态 Not RoHS (non-lead-free variant) [DATA_NEEDED: RoHS compliance]
生命周期状态 Obsolete - last time-buy period closed —
Logic Elements / Cells — 51840
System Gates — 1.5 M
Macros — 3456
User I/O — 488
Number of I/O Banks — [DATA_NEEDED: I/O bank count]
Propagation Delay — 1.84 ns
Internal Frequency — 160 MHz (per digchip) / 400 MHz (per fpgakey)
Process Technology — 0.22 µm CMOS
MSL 等级 — [DATA_NEEDED: MSL rating]
Configuration Method — JTAG / SRAM
Architecture — MultiCore (LUT + product-term)

数据手册与资源

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