EP20K200FC484-2X vs EP20K200FC484-1N 对比

详细并排对比 EP20K200FC484-2X 出自 Altera 和 EP20K200FC484-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200FC484-2X EP20K200FC484-1N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $95.00 $118.00
Family APEX 20K APEX 20K
Series EP20K200 APEX-20K®
Device Type FPGA (Field Programmable Gate Array) —
Maximum Logic Elements 8,320 cells —
Typical System Gates 200,000 —
Embedded Memory (EAB) 106,496 bits —
Maximum User I/O 382 382
Number of Logic Elements 8,320 —
Propagation Delay 3.0 ns 2.5 ns
Maximum Internal Frequency 200 MHz 250 MHz
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Core Supply Voltage 2.5 V —
封装 484-pin FBGA (FineLine BGA), 1.0 mm pitch 484-FBGA (23 x 23 mm)
安装类型 Surface Mount Surface Mount
工作温度 0 °C to 85 °C (commercial) 0 °C to +85 °C
Speed Grade -2 (with LVDS support, "X" suffix) —
Programmable I/O Standards 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS —
JTAG Support IEEE 1149.1 Boundary-Scan —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] —
Logic Elements / Cells — 8,320
System Gates — 200,000 (approx.)
Number of Macros — 832
Supply Voltage (Core) — 2.5 V (2.375 V – 2.625 V)
Package Code — BGA / FBGA
Number of Pins/balls — 484
Lead-Free / RoHS — Compliant (per distributor listings)
Architecture — MultiCore (LUT + product-term + embedded memory)
Configuration Method — SRAM-based, JTAG/ByteBlaster

数据手册与资源

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