EP20K300EQC240-2 vs EP20K300EQI240-3N 对比

详细并排对比 EP20K300EQC240-2 出自 Altera 和 EP20K300EQI240-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K300EQC240-2 EP20K300EQI240-3N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $89.00 $97.20
Family APEX-20KE® APEX 20KE
Series APEX 20K EP20K300
System Gates 300,000 300,000
Logic Elements / Cells 11,520 —
Embedded Memory (bits) 147,456 147,456
Maximum User I/Os 152 —
Internal Frequency (max) 160 MHz —
Propagation Delay 1.68 ns —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Core Supply Voltage 1.8 V 1.8 V nominal (1.71 V min, 1.89 V max)
Speed Grade -2 -3
封装 / 外壳 240-BFQFP (PQFP, 32x32 mm) —
安装类型 Surface Mount (Gull-Wing) —
Logic Family CMOS —
工作温度 0 °C to 85 °C (Commercial) -40 °C to +105 °C (industrial 'I' grade)
I/O Standards LVTTL, LVCMOS, PCI, LVDS (programmable) —
Architecture MultiCore™ with embedded system blocks (ESBs) —
RoHS 状态 [DATA_NEEDED: rohs status] [DATA_NEEDED: RoHS compliance from data]
Programming Tool Quartus II (legacy versions) —
Logic Elements — 11,520
Maximum User I/O — 152
Dedicated Inputs — 4
封装 — 240-pin BQFP/PQFP (PowerQuad Flat Pack)
I/O Standard Support — 1.5 V, 1.8 V, 2.5 V, 3.3 V (multi-volt I/O)
Programming Interface — IEEE 1149.1 JTAG (ByteBlaster / MasterBlaster)

数据手册与资源

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