EP20K30EQC208-2 vs EP20K60EQC208-2 对比

详细并排对比 EP20K30EQC208-2 出自 Intel 和 EP20K60EQC208-2 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K30EQC208-2 EP20K60EQC208-2
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $7.92 $65.50
Family APEX 20KE APEX-20KE
Device Logic FPGA (SRAM-based) —
Typical Gates 30,000 —
Logic Elements 1,200 —
Embedded Memory (RAM bits) 24,576 —
Maximum User I/O 125 —
Dedicated Inputs 4 —
封装 208-BFQFP (PQFP-208) 208-BFQFP (PQFP, 28x28 mm)
Speed Grade -2 (2.69 ns pin-to-pin) —
Core Supply Voltage 1.71 V to 1.89 V —
I/O Standard LVDS-compatible, 1.8 V / 2.5 V / 3.3 V (per bank) —
最大时钟频率 160 MHz —
Propagation Delay 2.69 ns 1.72 ns
Configuration Interface IEEE 1149.1 JTAG, Passive serial, Active serial —
工作温度 [DATA_NEEDED: operating temperature range] 0 °C to +85 °C (Commercial)
Process Technology 1.8 V CMOS, MultiCore architecture 0.22 µm
安装类型 Surface Mount (PQFP with gull-wing leads) Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
MSL 等级 [DATA_NEEDED: MSL rating] —
Logic Elements / Cells — 2560
Total Gates — 60000
User I/Os — 148
Number of Macrocells — 256
Internal Frequency (max) — 200 MHz
Supply Voltage (Core) — 1.71 V to 1.89 V
Logic Family — CMOS
PLLs / Clock Elements — 4
Programming Interface — JTAG / IEEE 1532 ISP
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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