EP20K400CF672C-7ES vs EP20K400CF672C7N 对比

详细并排对比 EP20K400CF672C-7ES 出自 Altera 和 EP20K400CF672C7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CF672C-7ES EP20K400CF672C7N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $132.00 $160.00
Family APEX 20KC APEX 20KC
Series EP20K400 —
System Gates 400,000 —
Logic Elements 16,640 —
Embedded Memory (bits) 212,992 —
Maximum User I/O 488 488
Number of PLLs 4 —
Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count from datasheet] —
Process Technology 0.15 um CMOS 0.18-micron CMOS, all-layer copper interconnect
Core Voltage 1.8 V —
Speed Grade -7 —
Maximum Internal Clock Frequency 375.94 MHz —
Propagation Delay (per Sierra IC) 1.400 ns —
工作温度范围 0 C to 85 C (commercial) —
封装 672-BGA (FineLine BGA, 1.00 mm pitch) 672-ball FineLine BGA (FC-FBGA / BBGA)
安装类型 Surface Mount Surface Mount (BGA)
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status not in provided data]
Configuration Support EPC16, EPC8, EPC4, EPC2, EPC1 serial devices; JTAG —
Maximum System Gates — 1,052,000
Typical Gates — 400,000
Logic Elements (LEs) — 16,640
Embedded Memory — 488 Kbits
User I/O (per catalog) — 480 / 502 (per source)
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 3.3 V / 2.5 V banked
Propagation Delay — 2.5 ns (catalog) / 1.48 ns (some catalog)
Maximum Frequency — 375.94 MHz (internal)
工作温度 — 0 C to 85 C (Commercial)
MSL 等级 — 3 (per JEDEC J-STD-020)
Configuration Modes — PS, PPS, JTAG

数据手册与资源

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