EP20K400CF672C7 vs EP20K400CF672C7N 对比

详细并排对比 EP20K400CF672C7 出自 Altera 和 EP20K400CF672C7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CF672C7 EP20K400CF672C7N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $195.00 $160.00
Series APEX-20KC —
Family APEX 20KC (MultiCore™) APEX 20KC
Logic Elements / Cells 16,640 —
System Gates 400,000 —
Embedded Memory (RAM bits) 212,992 —
Maximum User I/O 488 488
Number of I/O Banks 8 —
封装 672-BBGA (FC-FBGA, FineLine BGA) 672-ball FineLine BGA (FC-FBGA / BBGA)
引脚数量 672 —
Core Voltage 1.8 V —
电源电压 2.5 V (I/O reference) —
Process Technology 0.15 µm CMOS 0.18-micron CMOS, all-layer copper interconnect
Propagation Delay (tPD) 2.5 ns —
Maximum Internal Frequency 375.94 MHz —
工作温度 0 °C to +85 °C (Commercial, C-grade) 0 C to 85 C (Commercial)
PLL Count 4 —
Speed Grade -7 —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 Non-compliant (legacy product) [DATA_NEEDED: RoHS status not in provided data]
Lead-Free Contains lead (legacy BGA finish) —
Maximum System Gates — 1,052,000
Typical Gates — 400,000
Logic Elements (LEs) — 16,640
Embedded Memory — 488 Kbits
User I/O (per catalog) — 480 / 502 (per source)
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 3.3 V / 2.5 V banked
Propagation Delay — 2.5 ns (catalog) / 1.48 ns (some catalog)
Maximum Frequency — 375.94 MHz (internal)
MSL 等级 — 3 (per JEDEC J-STD-020)
Configuration Modes — PS, PPS, JTAG

数据手册与资源

浏览全部产品 创建 BOM 获取报价