EP20K400CF672C9ES vs EP20K400CF672C8AA 对比

详细并排对比 EP20K400CF672C9ES 出自 Altera 和 EP20K400CF672C8AA 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CF672C9ES EP20K400CF672C8AA
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $168.00 $145.00
Family APEX 20KC APEX 20K
Series APEX-20KC —
Logic Elements / Cells 16640 —
Gate Count 400000 —
Number of Gates 400 K —
Voltage - Supply (Core) 1.8 V —
Maximum Internal Frequency 250 MHz —
Total RAM Bits 488 kbit —
Process Technology 0.18 µm CMOS —
Number of I/O 488 —
封装 / 外壳 672-BBGA, FCBGA —
安装类型 Surface Mount Surface Mount
工作温度 0 °C to +85 °C (commercial) 0 C to 85 C (Commercial)
Speed Grade 9 —
MultiVolt I/O Support 1.8 V / 2.5 V / 3.3 V —
In-System Programmability Yes (JTAG) —
RoHS 状态 Unknown [DATA_NEEDED: RoHS status]
Lead-Free Unknown —
Number of Logic Elements/Cells — 16640
Number of Logic Units (LEs) — [DATA_NEEDED: number of LUs]
Embedded System Blocks (ESBs) — 212
On-chip RAM Bits — [DATA_NEEDED: total embedded memory bits]
Number of User I/O Pins — 488
Package Type — 672-ball Fine-Pitch BGA (FBGA)
Number of Pins/Balls — 672
Supply Voltage (Core) — 2.5 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O)
Propagation Delay — [DATA_NEEDED: typical propagation delay]
Packaging — Tray
湿敏等级(MSL) — 3 (168 Hours)
Configuration Interface — JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous

数据手册与资源

浏览全部产品 创建 BOM 获取报价