EP20K400EFC672-3N vs EP20K400FC672-3X 对比

详细并排对比 EP20K400EFC672-3N 出自 Intel 和 EP20K400FC672-3X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K400FC672-3X EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera

EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera

EP20K400FC672-3X ⚠ 最后一次采购

规格对比

参数 EP20K400EFC672-3N EP20K400FC672-3X
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $171.00 $152.40
Family APEX 20KE —
Series APEX 20K —
Device Type FPGA - Field Programmable Gate Array —
System Gates 1,052,000 —
Logic Elements 16,640 —
Logic Array Blocks (LABs) 1,664 macros —
Embedded RAM (EAB/ESB bits) 212,992 bits —
User I/O Pins 488 —
封装 672-BBGA (FC-FBGA) 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
引脚数量 672 —
Propagation Delay 2.5 ns —
Core Supply Voltage 1.71 V to 1.89 V (1.8 V nominal) 2.5 V
I/O Supply Voltage 2.5 V —
工作温度 0 °C to +85 °C (commercial) 0 °C to 85 °C (commercial)
Speed Grade -3 -3X
Technology CMOS, 0.18 µm (per APEX 20KE family) CMOS 0.22 µm
PLL Count 4 —
Architecture MultiCore (LUT + Embedded System Blocks) MultiCore (LUT + embedded CAM/RAM)
RoHS 状态 [DATA_NEEDED: specific RoHS status - likely non-compliant given part age] [DATA_NEEDED: RoHS compliance]
Logic Family — APEX 20K
Device Sub-family — EP20K400
Number of Gates — 400,000 (typical)
Logic Cells — 16,640
Macros / Macrocells — 1664
User I/Os — 502
Dedicated I/O Lines — 496
最大时钟频率 — 181.82 MHz
Typical Propagation Delay — 2.07 ns
Programming Interface — JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster
安装类型 — Surface Mount (BGA)

数据手册与资源

浏览全部产品 创建 BOM 获取报价