EP20K400FC672-2 vs EP20K400FI672-2N 对比

详细并排对比 EP20K400FC672-2 出自 Intel 和 EP20K400FI672-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400FC672-2 EP20K400FI672-2N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $171.00 $188.75
Series APEX-20K —
Family APEX-20K (MultiCore) APEX 20K
Logic Elements / Cells 16640 16,640
Number of Macrocells 1664 —
Number of Logic Blocks [DATA_NEEDED: LAB count] —
Number of Gates 400000 —
Embedded Memory (Bits) 212992 —
Maximum User I/O 502 488
Number of I/O Banks [DATA_NEEDED: I/O bank count] —
Operating Frequency (Max) 200 MHz —
Propagation Delay (tpd) 2.5 ns —
Core Supply Voltage 2.5 V —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
工作温度 0°C to +85°C (Commercial) Commercial (0 °C to +70 °C) [DATA_NEEDED: industrial variant]
封装 672-ball FC-FBGA (BBGA) 672-pin FC-FBGA (Flip-Chip Fine-pitch BGA)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant (lead-free)
Speed Grade -2 -2
Typical Gates — 400,000
Embedded Memory Bits — 212,992 bits
Embedded Array Blocks (EABs) — [DATA_NEEDED: EAB count per family datasheet]
Core Voltage — 2.5 V
Maximum Frequency — 200 MHz
Package Body Size — 27 x 27 mm
Terminal Pitch — 1.0 mm
Propagation Delay — 3.1 ns
湿敏等级(MSL) — 3
Peak Reflow Temperature — 220 °C
Configuration Modes — PS, PPS, PPA, JTAG
Supported I/O Standards — LVTTL, LVCMOS, SSTL, HSTL

数据手册与资源

浏览全部产品 创建 BOM 获取报价