EP20K400FC672-3 vs EP20K400CF672C9 对比

详细并排对比 EP20K400FC672-3 出自 Altera 和 EP20K400CF672C9 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400FC672-3 EP20K400CF672C9
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $138.00 $390.40
Family APEX 20K —
Device Logic Elements 16,640 cells —
Typical Gate Count 400,000 system gates —
Maximum User I/Os 502 488
Propagation Delay 2.5 ns 2.5 ns
Internal Performance 167 MHz —
Process Technology 0.22 µm CMOS 0.22 um CMOS
Core Supply Voltage 2.5 V 2.5 V
Logic Family CMOS, SRAM-based —
封装 672-pin FC-FBGA —
Package Code BGA —
Number of Terminals 672 —
Terminal Form Ball (BGA) —
Speed Grade -3 (commercial fastest) —
工作温度 0 °C to 85 °C 0C to +85C (Commercial)
安装类型 Surface Mount Surface Mount
Architecture MultiCore (LUT + Embedded System Blocks) —
Programming Method SRAM, JTAG (ByteBlaster) —
生命周期状态 Obsolete / Legacy —
RoHS 状态 [DATA_NEEDED: RoHS status] RoHS non-compliant (legacy)
Series — APEX-20KC
Logic Family / Architecture — MultiCore (LUT + ESB)
System Gates — 400,000
Logic Cells / Elements — 16,640
封装 / 外壳 — 672-BBGA, FCBGA
Supplier Device Package — 672-FBGA (27x27 mm)
Ball Pitch — 1.0 mm
I/O Supply Voltage — [DATA_NEEDED: I/O VCCIO range]
Internal Maximum Frequency — 368 MHz
Embedded Memory — Embedded System Blocks (ESB)
Configuration Method — Serial / Parallel PROM

数据手册与资源

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