EP20K400FI672-3 vs EP20K400FI672-2 对比
详细并排对比 EP20K400FI672-3 出自 Altera 和 EP20K400FI672-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 Obsolete规格对比
| 参数 | EP20K400FI672-3 | EP20K400FI672-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $92.40 |
| Family | APEX 20K | APEX-20K |
| Series | EP20K400 | — |
| Logic Elements | 16640 | 16640 |
| Total Gates | up to 400000 | — |
| Embedded RAM | 212992 bits | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 6 | — |
| Propagation Delay | 3.6 ns | 2.5 ns |
| 最大时钟频率 | 833 MHz | — |
| Supply Voltage (Nominal) | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | CMOS | 0.22 µm CMOS |
| Package Type | PBGA (Plastic BGA) | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) |
| Package Code | S-PBGA-B672 | — |
| Terminal Count | 672 | — |
| Terminal Pitch | 1.000 mm | — |
| Package Shape | Square BGA | — |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| Configuration Interface | JTAG (IEEE 1149.1) | — |
| 工作温度 | [DATA_NEEDED: operating temperature range] | 0 °C to +85 °C (Commercial) |
| MSL 等级 | 3 | — |
| Peak Reflow Temperature | 220 C | — |
| Maximum Gates | — | 400,000 gates |
| User I/Os | — | 502 |
| Embedded Memory Bits | — | 212992 |
| Number of Macros | — | 1664 |
| Core Supply Voltage | — | 2.5 V |
| Maximum Internal Frequency | — | 200 MHz |
| PLLs (Phase-Locked Loops) | — | 4 |
| Configuration Modes | — | JTAG, Passive Serial, Passive Parallel |
| RoHS 状态 | — | Lead-free / RoHS Compliant |