EP20K400GC655-2 vs EP20K400GI655-2 对比

详细并排对比 EP20K400GC655-2 出自 Altera 和 EP20K400GI655-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400GC655-2 EP20K400GI655-2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $80.00 $175.00
Series APEX-20KC APEX 20K (EP20K400)
Family APEX 20K —
Device Type FPGA (Field Programmable Gate Array) Field Programmable Gate Array (FPGA)
System Gates 400,000 —
Logic Cells / Elements 16,640 —
Total RAM Bits 212,992 —
Maximum Internal Frequency 200 MHz —
Speed Grade -2 —
Process Technology 0.22 µm CMOS —
Core Supply Voltage 2.5 V —
I/O Supply Voltage 1.71 V to 1.89 V (MultiVolt) —
LVDS Support Yes —
PLLs 4 —
引脚数量 655 —
Package Type 655-BCPGA (CPGA-655) —
Package Dimensions 62.48 x 62.48 mm —
安装类型 Through-Hole (CPGA) Through-Hole / Socket
工作温度 [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Manufacturer — Altera Corporation
Typical Gate Count — 400,000 gates
Logic Elements (LE) — 16,640
Maximum User I/O — 496
Dedicated Inputs — 6
Number of Terminals — 655
封装 — SPGA-655 (47 mm x 47 mm)
Nominal Supply Voltage — 2.5 V
Supply Voltage Range — 2.375 V to 2.625 V
Propagation Delay — 3.1 ns (typical)
Technology — CMOS SRAM
Moisture Sensitivity Level — 1 (per Altera family)
Configuration Method — JTAG, Passive Serial, Passive Parallel
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+
Embedded Memory — Embedded System Blocks (ESBs)
生命周期状态 — Obsolete (legacy Altera APEX 20K family)

数据手册与资源

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