EP20K400GC655-2X vs EP20K400PI655-2X 对比

详细并排对比 EP20K400GC655-2X 出自 Altera 和 EP20K400PI655-2X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400GC655-2X EP20K400PI655-2X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $175.00 $105.00
Family APEX 20K APEX 20K
Series APEX-20KC® —
Logic Elements / Cells 16640 —
System Gates 400000 —
Total RAM Bits 212992 —
Number of I/O 496 —
Number of Dedicated Inputs 6 —
Number of LABs/CLBs [DATA_NEEDED: number of Logic Array Blocks] —
Number of EABs [DATA_NEEDED: number of Embedded Array Blocks] —
Maximum Operating Frequency 200 MHz —
Process Technology 0.22 µm CMOS 0.18 um CMOS
Core Supply Voltage 2.5 V —
I/O Supply Voltage (MultiVolt) 2.5 V / 3.3 V / 5 V —
Package Type 655-BCPGA (SPGA655) —
Package Body Material CERAMIC, metal-sealed cofired grid array —
Package Dimensions 47 x 47 mm —
Peak Reflow Temperature 220 °C —
安装类型 Through-hole (CPGA) Surface Mount
Programmability In-system, JTAG (IEEE 1149.1) —
工作温度 [DATA_NEEDED: temperature grade] -40C to +85C (Industrial)
RoHS 状态 unknown —
Device Series — EP20K400
Speed Grade — -2X
Maximum Logic Elements — 16,640
Maximum System Gates — 400,000
Maximum RAM Bits — 166,400
Embedded System Blocks (ESBs) — 104
Maximum User I/O Pins — 488
Maximum PLLs — 4
封装 — PQFP-655 (Power Quad Flat Pack)
Core Voltage — 3.3 V
I/O Standards — LVTTL, LVCMOS, PCI, GTL+
Configuration Method — Serial / Parallel / JTAG
Lead-Free / RoHS — [DATA_NEEDED: lead-free status]
生命周期状态 — Obsolete (legacy Altera APEX 20K family)

数据手册与资源

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