EP20K400GI655-1 vs EP20K400GI655-2X 对比

详细并排对比 EP20K400GI655-1 出自 Altera 和 EP20K400GI655-2X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400GI655-1 EP20K400GI655-2X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $195.00 $195.00
Family APEX 20K APEX-20K (loadable PLD / FPGA)
Device Series EP20K400 —
Technology CMOS, SRAM-based —
Logic Elements 16640 —
Typical Gates 400000 —
Maximum User I/O 502 502
Dedicated Inputs 4 —
Total Terminals 655 —
Propagation Delay 2.5 ns —
Package Type Ceramic Pin Grid Array (CPGA-655) —
JESD-30 Package Code S-CPGA-P655 —
工作温度 -40C to +85C (Industrial) —
Moisture Sensitivity Level MSL 1 —
Peak Reflow Temperature 220 C —
Programmability In-system, JTAG boundary-scan (IEEE 1149.1) —
Process Node 0.18 micrometer CMOS —
RoHS 状态 Compliant [DATA_NEEDED: RoHS compliance]
Series — APEX-20K
Logic Elements (LEs) — 16,640
System Gates — 400,000
Total I/O Lines — 496 (bidirectional) + 4 (dedicated inputs)
Embedded Memory (bits) — 212,992
Nominal Core Supply Voltage — 2.5 V
Supply Voltage Range — 2.375 V to 2.625 V
I/O Supply Voltages — 2.5 V / 3.3 V
Process Technology — CMOS
Propagation Delay (typical, -2 grade) — 3.1 ns
封装 — 655-ball FineLine BGA (SPGA655, 47x47 mm)
Package Code — SPGA655, 47x47
Surface Mount — Yes (BGA)
湿敏等级(MSL) — 1
Operating Temperature (industrial -X grade) — -40C to +85C (industrial)
Qualification — Not Qualified (per distributor listing)
JTAG Support — IEEE 1149.1 boundary-scan / programming

数据手册与资源

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