EP20K600CEF672C7 vs EP20K600CF1020C7 对比

详细并排对比 EP20K600CEF672C7 出自 Intel 和 EP20K600CF1020C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K600CF1020C7 EP20K600CF1020C7 - APEX 20KC 600K Gates 1.8V FPGA | Altera

EP20K600CF1020C7 - APEX 20KC 600K Gates 1.8V FPGA | Altera

EP20K600CF1020C7 ⚠ 最后一次采购

规格对比

参数 EP20K600CEF672C7 EP20K600CF1020C7
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $98.40 $212.40
Manufacturer Intel (formerly Altera) Altera (now Intel)
Series APEX 20KC —
Family APEX 20KC (Enhanced Configuration) APEX 20KC
Device Type FPGA / Loadable PLD —
Logic Elements / Cells 24,320 24,320
Gate Count (typical) 600,000 gates —
Maximum Operating Frequency 375.94 MHz 375.94 MHz
Propagation Delay 1.48 ns (typ) —
User I/Os 488 —
Core Supply Voltage 1.8 V —
Process Technology 0.15 µm CMOS, all-layer copper 0.15 micrometer CMOS
封装 672-ball FineLine BGA (FC-FBGA) 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
Package Code BGA-652, 45 x 45 mm, 1.27 mm pitch —
工作温度 0 °C to +85 °C (commercial) —
Configuration SRAM-based, serial or parallel (EPC) —
Embedded Memory EAB blocks (dual-port RAM with byte enables) —
LVDS Support True-LVDS channels integrated —
MultiVolt I/O 1.8 V, 2.5 V, 3.3 V interfaces —
External Memory Interface DDR SDRAM, QDR SRAM —
JTAG Support IEEE 1149.1 boundary-scan —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Typical Gates — 311,000
Maximum System Gates — 600,000
Core Voltage (VCCINT) — 1.71 V to 1.89 V (nominal 1.8 V)
I/O Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent)
User I/O Count — 588
Total Inputs — 580 + 4 dedicated
Propagation Delay (Tpd) — 1.6 ns
安装类型 — Surface Mount (BGA)
Operating Temperature Grade — Commercial (C)
Speed Grade — 7
Configuration Method — SRAM-based, serial/parallel passive or enhanced configuration device
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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