EP20K600CF33C8N vs EP20K600CF33C8 对比

详细并排对比 EP20K600CF33C8N 出自 Intel 和 EP20K600CF33C8 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF33C8N EP20K600CF33C8
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $162.75 $285.75
Family APEX 20KC APEX 20KC
Logic Elements / Cells 24,320 —
Total RAM Bits 311,296 —
Number of LABs / CLBs 2,432 —
Number of Gates 1,537,000 (max) —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
Core Voltage Supply 1.71 V to 1.89 V (1.8 V nominal) —
Technology / Process 0.15 µm CMOS —
Maximum Internal Frequency 301.21 MHz —
Speed Grade -8 (slower than -7) -8
工作温度 0°C to 85°C (TJ) Commercial (0 °C to +85 °C)
封装 1020-pin FC-FBGA (flip-chip) 1020-ball FineLine BGA (FC-FBGA), 33 x 33 mm
Pitch 0.33 mm —
安装类型 Surface Mount —
Programmable Type In-System / SRAM-based —
Configuration Interface JTAG (IEEE 1149.1) + Passive Serial / Parallel —
RoHS 状态 Compliant (N suffix) Compliant (lead-free version) / non-compliant for legacy C-speed grade variant
Device Type — FPGA (Field Programmable Gate Array)
Typical Gates — 600,000
Logic Elements — 24,320
Embedded RAM Bits — 311,296
Embedded System Blocks (ESB) — 152
Maximum User I/O — 488
Process Technology — 0.15 µm CMOS
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V (bank-selectable)
LVDS Support — Yes, up to 840 Mbps
PLLs — 4 enhanced PLLs
Configuration Modes — Passive Serial, Passive Parallel Asynchronous, Passive Parallel Synchronous, JTAG
Status — NRND / Last-Time-Buy (per Altera/Intel product notice)

数据手册与资源

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