EP20K600CF33C9 vs EP20K600CF33C7 对比
详细并排对比 EP20K600CF33C9 出自 Intel 和 EP20K600CF33C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K600CF33C9 | EP20K600CF33C7 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $171.00 | $105.40 |
| Family | APEX 20KC | APEX-20K Field Programmable Gate Array |
| Process Technology | 0.15 µm CMOS | — |
| System Gates | 600,000 (maximum) | — |
| Logic Elements / Cells | 24,320 | — |
| Maximum Operating Frequency | 250 MHz | — |
| 最大时钟频率 | 303.03 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Core Supply Voltage (VCCINT) | 1.8 V nominal (1.71 V to 1.89 V) | 1.71 V to 1.89 V |
| User I/O | 588 (4 dedicated inputs + 580 general-purpose I/O) | — |
| 封装 | 1020-ball FC-FBGA | 1020-BBGA / FCBGA (33x33 mm) |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| 工作温度范围 | [DATA_NEEDED: operating temperature range] | -40C to +85C (Industrial) |
| Embedded RAM | Dual-port RAM blocks (per family) | — |
| Programmability | JTAG / IEEE 1149.1 ISP, SRAM-based | — |
| RoHS 状态 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| MSL 等级 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Logic Block Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS (per family datasheet) | — |
| Series | — | APEX-20K |
| Typical Gate Count | — | 600,000 gates |
| Logic Elements | — | 24,320 |
| Embedded RAM Bits | — | 311,296 bits |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO range] |
| Package Code | — | BGA, 1020 balls |
| Speed Grade | — | C7 (7 ns) |
| Terminal Form | — | Ball |
| Configuration Memory | — | SRAM (volatile, requires external config device) |