EP20K600CF672C7 vs EP20K600CB672C7 对比

详细并排对比 EP20K600CF672C7 出自 Intel 和 EP20K600CB672C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672C7 EP20K600CB672C7
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $2,267.89 $182.50
Family APEX-20KC APEX 20KC
Device Type SPLD / FPGA FPGA / Programmable Logic Device (PLD)
System Gates 600,000 —
Logic Cells 24,320 —
User I/O 508 —
封装 672-ball FC-FBGA (27x27 mm) 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch)
Ball Pitch 1.27 mm —
Core Voltage (VCCINT) 1.71 V to 1.89 V —
Process Technology 0.15 um CMOS, all-layer copper 0.15 µm all-layer copper-metal CMOS
Propagation Delay (typ.) 1.48 ns —
工作温度 0C to 85C (commercial) 0 °C to 85 °C (commercial)
Speed Grade C7 C7 (commercial, 0 °C to 85 °C)
Embedded Memory Dual-port RAM via ESBs 311 kbits (EAB-based)
CAM Support Yes (ESB-based content-addressable memory) —
安装类型 Surface Mount —
RoHS 状态 Compliant Compliant
Typical Gates — 600,000
Maximum System Gates — 1,053,840
Logic Elements — 30,960 (typical)
User I/Os — 488
Propagation Delay — 1.48 ns
Core Voltage — 2.5 V
I/O Voltage Support — 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O)
Number of PLLs — 4
Dual-Port RAM — Yes (4.5 ns access)
Supported I/O Standards — LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT
Configuration Method — EPC configuration devices / JTAG / passive serial

数据手册与资源

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