EP20K600CF672C7N vs EP20K600CF672C8N 对比

详细并排对比 EP20K600CF672C7N 出自 Altera 和 EP20K600CF672C8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672C7N EP20K600CF672C8N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $108.00 $108.00
Device Family APEX 20KC —
Maximum System Gates 1,052,000 —
Typical Gates 600,000 —
Logic Elements / Cells 24,320 —
Maximum User I/O Pins 488 —
Total Package Pins 652 —
封装 FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch BGA-652, 45 x 45 mm, 1.27 mm pitch
Core Voltage 1.8 V —
Maximum Operating Frequency 375.94 MHz —
Propagation Delay 1.48 ns 1.48 ns
Process Technology 0.15 µm all-layer copper-metal CMOS —
Architecture MultiCore (LUT + Embedded System Memory) —
工作温度 0 °C to +85 °C (Commercial) 0°C to 85°C
Speed Grade C7 —
Seated Height 3.50 mm —
安装类型 Surface Mount (BGA) Surface mount
RoHS 状态 unknown unknown
Device Type — SPLD
Product Type — FPGA / programmable logic device
Family — APEX 20KC
Nominal Gate Capacity — 600K gates
Logic Elements or Cells — 24,320
Macros — 2,432
User I/O Count — 508
Package Terminals — 652 pins
Package Description — 672-pin FC-FBGA
电源电压 — 1.8 V
Listed Frequency — 301.21 MHz
Fabrication Process — 0.15 µm
Interconnect Metal — All-layer copper metal
I/O Configuration — 508 user I/O
REACH Status — unknown
AEC-Q100 Qualification — unknown
Configuration Method — [DATA_NEEDED: configuration memory and programming method]
Core Current — [DATA_NEEDED: core supply current]
I/O Bank Voltage — [DATA_NEEDED: supported I/O voltage range]
Junction Temperature — [DATA_NEEDED: maximum junction temperature]
热阻 — [DATA_NEEDED: junction-to-ambient thermal resistance]

数据手册与资源

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