EP20K600CF672I7 vs EP20K600CF672C9 对比
详细并排对比 EP20K600CF672I7 出自 Altera 和 EP20K600CF672C9 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K600CF672I7 | EP20K600CF672C9 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $220.00 | $171.00 |
| Family | APEX 20KC | — |
| Maximum Logic Elements | 24,320 cells | — |
| System Gates | 600,000 | — |
| Maximum User I/O | 508 | 488 pins |
| Maximum Internal Frequency | 375.94 MHz | 250 MHz |
| Process Technology | 0.15 µm CMOS | 0.15 µm all-layer copper-metal |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V (LVTTL/LVCMOS compatible) | — |
| Speed Grade | -7 | — |
| 工作温度 | -40 °C to +100 °C (industrial, I-suffix) | 0 °C to +85 °C (commercial) |
| 封装 | 672-ball FineLine BGA (FC-FBGA, 27×27 mm) | — |
| Ball Pitch | 1.00 mm | — |
| Embedded System Blocks | Yes (dual-port RAM / CAM) | — |
| Configuration Interface | IEEE 1149.1 JTAG, passive serial, fast passive parallel | IEEE 1149.1 JTAG / passive serial / EPC configuration |
| 安装类型 | Surface Mount (BGA) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Family | — | APEX 20KC |
| Typical Gate Count | — | 600,000 gates |
| Logic Elements (LEs) | — | 24,320 |
| Embedded Memory (EAB) | — | 311 Kbits |
| Propagation Delay | — | 1.48 ns |
| Core Voltage | — | 1.8 V |
| Package Type | — | 672-pin FC-FBGA |
| Package Dimensions | — | 45 x 45 mm, 1.27 mm pitch |
| Total Pin Count | — | 652 balls |